This invention relates to a voltage output circuit comprising a semiconductor circuit including MOS (Metal Oxide Semiconductor) and bipolar devices for converting a CMOS (Complementary MOS) or a TTL (Transistor Transistor Logic) level voltage signal to an ECL (Emitter Coupled Logic) level voltage signal and for outputting the ECL level voltage signal.
TTL-ECL output circuits of the type described above are known. Examples of such circuits include MC10124 to MC10191 TTL-ECL output circuits, of Motorola Inc. (MECL 10K series) are known in the art. The known output circuits, however, require both a positive power supply (for example, +5 volts) for driving a CMOS circuit or a TTL circuit and a negative power supply (for example, -5.2 V) for driving an ECL circuit. This is not desirable from the standpoint of cost. Furthermore, owing to the use of the positive and negative power supplies, elements in these known circuits are required to have a breakdown voltage high enough for the sum of both the power supply voltages. Where one of these known output circuits and another circuit are formed on a common chip, each of these circuits is also required to have a breakdown voltage high enough for the sum of both the power supply voltages.
In summary, conventional output circuits for converting a CMOS or a TTL level voltage signal to an ECL level voltage signal require both the positive and negative power supplies and, furthermore, when they are formed, together with another circuit, the latter circuit is also required to have a breakdown voltage high enough for the aforementioned sum voltages.